In numerous applications there is a need to output digital values as uniformly as possible particularly in analog form, whereby the digital values can arrive at irregular intervals due to the asynchronous transmission. As uniform output as possible is desired particularly with acoustic signals, as they occur for example in telephone communications or the transmission of radio programs. The same applies for multimedia data, such as for example graphic data or combined video and audio data.
As a consequence of the asynchronous transmission no central master clock, on which the various components involved in the transmission can fall back, is available in such a system. Each of the components involved therefore itself produces in such systems the clock necessary for outputting data or for inputting data.
If data are transmitted between two components in such a system, then every effort is made to output the data on the receiver side at the same output frequency as they have been inputted on the transmitter side. In this case however the following problem arises. FIG. 4 shows the example of the situation, in which data D, that are outputted or inputted by the components A, B in analog form, are transmitted bi-directionally between two components A and B via lines P. In this case the component A uses the frequency fA for sending the data D and for outputting received data D. Correspondingly the component B uses the frequency fB. Since in practice the two frequencies fA and fB are never completely the same, this means that after a certain time more data D is transmitted in one direction than in the other. In FIG. 4 the amount of data D transmitted in both directions is illustrated for clarity over the time t. Here it can be seen that seven data elements were transmitted from the component A to the component B, in the opposite direction however only six data elements were transmitted. This means that in the case of the component B in time a data overflow arises, in the case of which more data D are received than outputted, and therefore a data bottleneck develops. In practice this is resolved by the fact that surplus data are eliminated. On the other hand the ease arises that the data D are received by the component A at a lower frequency than they are outputted. With the output of the data D therefore data, which are produced by interpolation according to a method known from prior art, are missing.